1. Field of the Invention
The present invention relates to a distributed amplifier having a broadband characteristic that is employed in an optical communication system, for example.
2. Description of the Related Art
The prior art includes Japanese Patent Kokai No. H7-183428 (Patent Document 1) and Japanese Patent Kokai No. 2003-152476 (Patent Document 2).
FIG. 1 is a constitutional view of a conventional distributed amplifier.
As per the circuit constitution shown in FIG. 1, this distributed amplifier comprises an input-side transmission line 2 connected to an input terminal 1 that is supplied with input signals over a wide range. The input-side transmission line 2 serially connects seven line elements 2a, 2b, . . . , 2g, for example. The leading terminal of line element 2a is connected to input terminal 1 and the end terminal of line element 2g is connected to the ground potential GND via a terminator 3.
This distributed amplifier also comprises an output-side transmission line 4 that corresponds with the input-side transmission line 2. The output-side transmission line 4 serially connects seven line elements 4a, 4b, . . . , 4g. The leading terminal of the line element 4a is connected to the ground potential GND via a terminator 5 and the end terminal of the line element 4g is connected to an output terminal 6.
Six transistors 7a, 7b, . . . , 7f, which are amplification units, are also connected in the form of a distribution circuit via six transistors 7a, 7b, . . . , 7f constituting amplification units and a transmission line 8 between the input-side transmission line 2 and the output-side transmission line 4. That is, the gate electrode of the transistor 7a is connected to the connection point of the line elements 2a and 2b and the drain electrode of the transistor 7a is connected to the connection point of the line elements 4a and 4b via the line element 8a of the transmission line 8. Likewise, hereinafter, the gate electrode of the transistor 7f is connected to the connection point of the final line elements 2f and 2g and the drain electrode of the transistor 7f is connected to the connection point of the line elements 4f and 4g via the line element 8f. The source electrodes of the transistors 7a to 7f are connected to the ground potential GND. Further, a supply voltage VDD is supplied to the output terminal 6 via an inductor 9.
Representative forms that constitute the input-side transmission line 2, output-side transmission line 4 and amplification-unit transmission line 8 include the microstrip line and coplanar line.
As shown in FIG. 2, the microstrip line is constituted such that the whole of the rear face of the dielectric substrate SUB1 is the ground face G1 and the signal line S1 is disposed on the upper surface of the dielectric substrate SUB1. Supposing that the width of the signal line S1 is w1 and the thickness of the dielectric substrate SUB1 is t, the characteristic impedance Z0 of the microstrip line can be expressed as Z0=A×t/w1 (where A is the proportionality constant).
Meanwhile, as shown in FIG. 3, the coplanar line has a signal line S2 disposed on the upper surface of a dielectric substrate SUB2 and there is a ground face G2 on both sides of the signal line S2. Supposing that the width of the signal line S2 is w2 and the interval between the signal line S2 and ground faces G2 is w3, the characteristic impedance Z0 of the coplanar line can be expressed as Z0=B×w3/w2 (where B is the proportionality constant).
The distributed amplifier is normally designed with an I/O impedance of 50Ω. For this reason, the characteristic impedance Z0 of the input-side transmission line 2 or the like must be set as 70 to 90Ω in consideration of the static capacitance of the transistors 7a to 7f of the amplification unit.
However, the distributed amplifier is subject to the following problems.
(1) When the input-side transmission line 2 and output-side transmission line 4 are both constituted by a microstrip line, the signal line and ground face are on different faces with a dielectric substrate interposed therebetween. Therefore, viaholes must be provided in the dielectric substrate in order to reach ground via the shortest route as per the source electrodes of the transistors 7a to 9f in FIG. 1, which makes the wiring process complicated.
(2) When the input-side transmission line 2 and output-side transmission line 4 are both constituted by a coplanar line, the width w2 and internal w3 must both be wide in order to provide characteristic impedance Z0 of 70 to 90Ω and to secure the current capacitance flowing to the transistors 7a to 9f. 
For example, when a microstrip line with a signal line width of 50 μm is created by using a GaAs substrate that is 220 μm thick, the characteristic impedance is then 77Ω. In contrast, in order to create a coplanar line with the same signal line width and characteristic impedance by means of the same GaAs substrate, the interval between the signal line and ground faces must be 140 μm. Therefore, miniaturization of the circuit is problematic.
(3) As disclosed in Patent Document 1, when a microstrip line and a coplanar line are mixed and the signal lines of the microstrip line and coplanar line respectively are arranged on different faces, the structure is a complex one.